These octal D-type transparent latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, outputs (Q) respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.
OE does not affect internal operation of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The 74ALS573 is characterized for operation from 0°C to 70°C.
3-State Buffer-Type Outputs Drive Bus Lines Directly
True Logic Outputs
SOIC 20 package. Actual brand may vary from picture.