The 74HCT273 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). The 74HCT273 have eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously.
The state of each D input, one set-up time before the
LOW-to-HIGH clock transition, is transferred to the
corresponding output (Qn) of the flip-flop. All outputs will be forced LOW independently of clock or data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the clock and master reset are common to all storage elements.
Ideal buffer for MOS microprocessor or memory
Common clock and master reset
Eight positive edge-triggered D-type flip-flops
Output capability; standard
ICC category: MSI
20 pin DIP. Actual brand may vary from picture.