These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input and feature complementary outputs from each flip-flop. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. These circuits are fully compatible for use with most TTL circuits.
Contain Six Flip-Flops with Single-Rail Outputs
Buffered Clock and Direct Clear Inputs
Individual Data Input to Each Flip-Flop
Datasheet Available: Texas Instruments SN74LS174DR
SOIC 16 package. Manufactured by Texas Instruments.