The 74HCT138N is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The 74HCT138N decoder accepts three binary weighted address inputs (A0, A1 and A3) and when enabled, provides 8 mutually exclusive active LOW outputs (Y0 to Y7). The 74HCT138N features three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 lines to 32 lines) decoder with just four 74HCT138N ICs and one inverter.
The 74HCT138N can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Not used enable inputs must be permanently tied to their appropriate active HIGH- or LOW-state. The 74HCT138N is identical to the 74HCT238 but has inverting outputs.
Multiple input enable for easy expansion
Ideal for memory chip select decoding
Active LOW mutually exclusive outputs
Specified from -40°C to +125°C
Datasheet Available:Phillips 74HCT138N
16 pin DIP. Manufactured by Phillips.