CD4094BF is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive clock transistions. The data in each shift register stage is transferred to the storage register when the STROBE input is high. Data is the storage register appears at the outputs whenever the OUTPUT-ENABLE signal is high.
Two serial outputs are available for cascading a number of CD4094BF devices. Data is available at the OS serial output terminal on positive clock edges to allow for high-speed operation in cascaded systems in which the clock rise time is fast. The same serial information, available at the OS terminal on the next negative clock edge, provides a means for cascading CD4094BF devices when the clock rise time is slow.
3-State parallel outputs for connection to common bus
Seperate serial outputs for synchronous to both positive and negative clock edges for cascading
Medium speed operation
Standardized, symmetrical ouput characteristics
16 pin DIP. Manufactured by RCA.