The 74F823N is a 9-bit wide buffered register with clock enable (CE) and master reset (MR) which are ideal for parity bus interfacing in high microprogrammed systems.
High speed parallel registers with positive edge-triggered D-type flip-flops
High performance bus interface buffering for wide data/address paths or busses carrying parity
High impedance PNP base inputs for reduced loading (20mA inhigh and low states)
Buffered control inputs to reduce AC effects
Ideal where high speed, light loading, or increased fan-in as required with MOS microprocessor
Positive and negative over-shoots are clamped to ground
3-State outputs glitch free during power-up and power-down
Outputs sink 64mA and source 24mA
24 pin DIP. Manufactured by Signetics.