These quadruple bus transceivers are designed for asynchronous communications between data buses. The control function implementation allows for maximum flexibility in timing. These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic levels at the output-enable (OEBA and OEAB) inputs. The output-enable inputs can be used to disable the device so that the buses are effectively isolated.
The dual-enable configuration gives the quadruple bus transceivers the capability to store data by simultaneous enabling of OEBA and OEAB. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (eight in all) remain at their states. The 4-bit codes appearing on the two sets of buses will be identical for the 74F243.
The 74F243 is characterized for operation from 0°C to 70°C.
Asynchronous Communication Between Data Buses
Local Bus-Latch Capability
14 pin DIP. Actual brand may vary from picture.